# AHB Lite Interconnect

## Description

The AMBA AHB is for high-performance, high clock frequency system modules. The AHB acts as the high-performance system backbone bus. AHB supports the efficient connection of processors, on-chip memories and off-chip external memory interfaces with low-power peripheral macrocell functions.

## Devices Supported

ALL

## References

- User Guide

## Revision History

1.3.3 | IP Release Notes
1.3.2 | IP Release Notes

1.3.1

- Standardizes two AHB protocol terminologies on the GUI, "Master" is renamed to "Manager", and "Slave" to "Subordinate".
- Removes the unsupported "Weighted Round Robin" option from the "Arbiter Scheme" manager priority setting.

1.3.0 | Fixed behavior for cascaded interconnect instantiation.
1.2.0 | Updated to support all devices.
1.1.4 | Added MachXO3L and MachXO3LF device support.
1.1.3 | Added MachXO2 device support.
1.1.2 | Added LFMNX device support.
1.1.1 | Added port_type for clock and reset.
1.1.0 | Added sparse connection feature.
1.0.2 | Added support for Radiant platform.
1.0.1 | Added LIFCL and LFD2NX device support.
1.0.0 | Initial release.