The TSEMAC IP core is a 10/100/1000Mbps network interface as per the IEEE 802.3 standard.
It is a complex core containing all necessary logic, interfacing and clocking
infrastructure to allow integrating an external industry-standard Ethernet PHY
with an internal processor, with minimal overhead.
LIFCL-40, LIFCL-33, LIFCL-33U, LIFCL-17, LFD2NX-40, LFD2NX-17, LFD2NX-28, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T, LAV-AT-E30, LAV-AT-E70, LAV-AT-G70, LAV-AT-X70, LN2-CT-20
| 1.7.1 |
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| 1.6.0 | Added MAC+MPCS mode, for CPNX. Added RMII mode, under mac_only configuration. Added RGMII HW Example Design. Added low frequency support for system clock. Added Statistic Counter lite mode. Removed Classic mode, under mac_only configuration. It is not fully compliant to IEEE specification. |
| 1.5.1 | Added LAV-AT-E30 support. Reverted AXIS FIFO update for HW validation bug fix. |
| 1.5.0 | Added Avant-G/X support. Added MII/GMII mode, under mac_only configuration. Added 10M/100M support for RGMII mode. Updated AXIS FIFO. |
| 1.4.2 | Updated driver files. |
| 1.4.1 | Updated Propel support. |
| 1.4.0 | Added Statistic Counters. |
| 1.3.0 | Added Avant support. Added MAC+PHY mode, for Avant. Added AXI4L host interface. Updated CSR memory width, from 8bits to 32bits. |
| 1.2.0 | Added LFMXO5 support. |
| 1.1.0 | Added LFCPNX device support. Added RGMII interface. |
| 1.0.1 | Added LFD2NX device support. Added AXI4-stream interface. |
| 1.0.0 | Initial release |