/* ================================================================== >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< ------------------------------------------------------------------ Copyright (c) 2019-2023 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ IMPORTANT: THIS FILE IS USED BY OR GENERATED BY the LATTICE PROPEL™ DEVELOPMENT SUITE, WHICH INCLUDES PROPEL BUILDER AND PROPEL SDK. Lattice grants permission to use this code pursuant to the terms of the Lattice Propel License Agreement. DISCLAIMER: LATTICE MAKES NO WARRANTIES ON THIS FILE OR ITS CONTENTS, WHETHER EXPRESSED, IMPLIED, STATUTORY, OR IN ANY PROVISION OF THE LATTICE PROPEL LICENSE AGREEMENT OR COMMUNICATION WITH LICENSEE, AND LATTICE SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. LATTICE DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED HEREIN WILL MEET LICENSEE 'S REQUIREMENTS, OR THAT LICENSEE' S OPERATION OF ANY DEVICE, SOFTWARE OR SYSTEM USING THIS FILE OR ITS CONTENTS WILL BE UNINTERRUPTED OR ERROR FREE, OR THAT DEFECTS HEREIN WILL BE CORRECTED. LICENSEE ASSUMES RESPONSIBILITY FOR SELECTION OF MATERIALS TO ACHIEVE ITS INTENDED RESULTS, AND FOR THE PROPER INSTALLATION, USE, AND RESULTS OBTAINED THEREFROM. LICENSEE ASSUMES THE ENTIRE RISK OF THE FILE AND ITS CONTENTS PROVING DEFECTIVE OR FAILING TO PERFORM PROPERLY AND IN SUCH EVENT, LICENSEE SHALL ASSUME THE ENTIRE COST AND RISK OF ANY REPAIR, SERVICE, CORRECTION, OR ANY OTHER LIABILITIES OR DAMAGES CAUSED BY OR ASSOCIATED WITH THE SOFTWARE.IN NO EVENT SHALL LATTICE BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING OUT OF THE USE OF THIS FILE OR ITS CONTENTS, EVEN IF LATTICE HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. LATTICE 'S SOLE LIABILITY, AND LICENSEE' S SOLE REMEDY, IS SET FORTH ABOVE. LATTICE DOES NOT WARRANT OR REPRESENT THAT THIS FILE, ITS CONTENTS OR USE THEREOF DOES NOT INFRINGE ON THIRD PARTIES' INTELLECTUAL PROPERTY RIGHTS, INCLUDING ANY PATENT. IT IS THE USER' S RESPONSIBILITY TO VERIFY THE USER SOFTWARE DESIGN FOR CONSISTENCY AND FUNCTIONALITY THROUGH THE USE OF FORMAL SOFTWARE VALIDATION METHODS. ------------------------------------------------------------------ ================================================================== */ /** * @file : This file is used to intizalize the ethernet module and configure for sending and receving * of ethernet packet. */ #ifndef ETHERNET_H_ #define ETHERNET_H_ //Driver Details #define TSE_DRV_VER "v1.0.0" #define SUCCESS 1 #define FAILURE 0 #define IPG_TIME 12 #define MAX_PACKET_SIZE 1500 #define SPEED_10_OR_100_MBPS 0 #define SPEED_1G 0 #define SET_FULL_DUPLEX_MODE 5 #define SET_HALF_DUPLEX_MODE 5 #define SIXTEEN_BIT 16 #define ZERO 0 #define ONE 1 #define FOUR 4 typedef struct { unsigned char speed_mode; unsigned int adr; unsigned int frame_length; unsigned int mac_upper; unsigned int mac_lower; unsigned int multicast_upper; unsigned int multicast_lower; unsigned int tx_rx_ctrl_var; unsigned int enable_tx_mac; unsigned int enable_rx_mac; }tsemac_handle_t; /** * @brief Ethernet register. */ typedef struct { volatile unsigned int mode_reg; //0x0000 volatile unsigned int tx_rx_ctrl; volatile unsigned int max_packet_size; volatile unsigned int ipg; volatile unsigned int mac_addr0; //0x0010 volatile unsigned int mac_addr1; volatile unsigned int tx_rx_status; volatile unsigned int vlan_tag; volatile unsigned int gmii_mgmt_ctrl; //0x0020 volatile unsigned int gmii_mgmt_data; volatile unsigned int multi_cast0; volatile unsigned int multi_cast1; volatile unsigned int pause_opcode; //0x0030 volatile unsigned int tx_fifo_afull; volatile unsigned int tx_fifo_aempty; volatile unsigned int rx_fifo_afull; volatile unsigned int rx_fifo_aempty; //0x0040 volatile unsigned int interrupt_status; volatile unsigned int interrupt_enable; //0x0048 volatile unsigned int tx_stat_unicst_0; volatile unsigned int tx_stat_unicst_1; volatile unsigned int tx_stat_multcst_0; volatile unsigned int tx_stat_multcst_1; //0x0058 volatile unsigned int tx_stat_brdcst_0; volatile unsigned int tx_stat_brdcst_1; volatile unsigned int tx_stat_badfcs_0; volatile unsigned int tx_stat_badfcs_1; //0x0068 volatile unsigned int tx_stat_jumbo_0; volatile unsigned int tx_stat_jumbo_1; volatile unsigned int tx_stat_under_run_0; volatile unsigned int tx_stat_under_run_1; //0x0078 volatile unsigned int tx_stat_pause_0; volatile unsigned int tx_stat_pause_1; volatile unsigned int tx_stat_vlan_tg_0; volatile unsigned int tx_stat_vlan_tg_1; //0x0088 volatile unsigned int tx_stat_frm_length_0; volatile unsigned int tx_stat_frm_length_1; volatile unsigned int tx_stat_deferred_trans_0; volatile unsigned int tx_stat_deferred_trans_1; //0x0098 volatile unsigned int tx_stat_excess_deferred_trans_0; volatile unsigned int tx_stat_excess_deferred_trans_1; volatile unsigned int tx_stat_late_col_0; volatile unsigned int tx_stat_late_col_1; //0x00A8 volatile unsigned int tx_stat_excess_col_0; volatile unsigned int tx_stat_excess_col_1; volatile unsigned int tx_stat_num_early_col_0; volatile unsigned int tx_stat_num_early_col_1; //0x00B8 volatile unsigned int tx_stat_shrt_frm_dis_fcs_0; volatile unsigned int tx_stat_shrt_frm_dis_fcs_1; volatile unsigned int tx_stat_ptp_1588_frm_0; volatile unsigned int tx_stat_ptp_1588_frm_1; //0x00C8 volatile unsigned int tx_stat_frm_64_0; volatile unsigned int tx_stat_frm_64_1; volatile unsigned int tx_stat_frm_65_127_0; volatile unsigned int tx_stat_frm_65_127_1; //0x00D8 volatile unsigned int tx_stat_frm_128_255_0; volatile unsigned int tx_stat_frm_128_255_1; volatile unsigned int tx_stat_frm_256_511_0; volatile unsigned int tx_stat_frm_256_511_1; //0x00E8 volatile unsigned int tx_stat_frm_512_1023_0; volatile unsigned int tx_stat_frm_512_1023_1; volatile unsigned int tx_stat_frm_1024_1518_0; volatile unsigned int tx_stat_frm_1024_1518_1; //0x00F8 volatile unsigned int tx_stat_frm_1519_2047_0; volatile unsigned int tx_stat_frm_1519_2047_1; volatile unsigned int tx_stat_frm_2048_4095_0; volatile unsigned int tx_stat_frm_2048_4095_1; //0x108 volatile unsigned int tx_stat_frm_4096_9216_0; volatile unsigned int tx_stat_frm_4096_9216_1; volatile unsigned int tx_stat_frm_9217_16383_0; volatile unsigned int tx_stat_frm_9217_16383_1; //0x118 volatile unsigned int rx_stat_frm_length_0; volatile unsigned int rx_stat_frm_length_1; volatile unsigned int rx_stat_vlan_tg_0; volatile unsigned int rx_stat_vlan_tg_1; //0x128 volatile unsigned int rx_stat_pause_0; volatile unsigned int rx_stat_pause_1; volatile unsigned int rx_stat_ctrl_0; volatile unsigned int rx_stat_ctrl_1; //0x138 volatile unsigned int rx_stat_unsp_opcode_0; volatile unsigned int rx_stat_unsp_opcode_1; volatile unsigned int rx_stat_dribb_nibb_0; volatile unsigned int rx_stat_dribb_nibb_1; //0x148 volatile unsigned int rx_stat_brdcst_0; volatile unsigned int rx_stat_brdcst_1; volatile unsigned int rx_stat_multcst_0; volatile unsigned int rx_stat_multcst_1; //0x158 volatile unsigned int rx_stat_unicst_0; volatile unsigned int rx_stat_unicst_1; volatile unsigned int rx_stat_rcvd_ok_0; volatile unsigned int rx_stat_rcvd_ok_1; //0x168 volatile unsigned int rx_stat_length_error_0; volatile unsigned int rx_stat_length_error_1; volatile unsigned int rx_stat_crc_error_0; volatile unsigned int rx_stat_crc_error_1; //0x178 volatile unsigned int rx_stat_pkt_ignore_0; volatile unsigned int rx_stat_pkt_ignore_1; volatile unsigned int rx_stat_previous_carrier_event_0; volatile unsigned int rx_stat_previous_carrier_event_1; //0x188 volatile unsigned int rx_stat_ptp1588_frm_0; volatile unsigned int rx_stat_ptp1588_frm_1; volatile unsigned int rx_stat_ipg_viol_0; volatile unsigned int rx_stat_ipg_viol_1; //0x198 volatile unsigned int rx_stat_shrt_frm_0; volatile unsigned int rx_stat_shrt_frm_1; volatile unsigned int rx_stat_lng_frm_0; volatile unsigned int rx_stat_lng_frm_1; //0x1A8 volatile unsigned int rx_stat_frm_undersize_0; volatile unsigned int rx_stat_frm_undersize_1; volatile unsigned int rx_stat_frm_fragement_0; volatile unsigned int rx_stat_frm_fragement_1; //0x1B8 volatile unsigned int rx_stat_frm_jabber_0; volatile unsigned int rx_stat_frm_jabber_1; volatile unsigned int rx_stat_frm_64_good_crc_0; volatile unsigned int rx_stat_frm_64_good_crc_1; //0x1C8 volatile unsigned int rx_stat_frm_1518_good_crc_0; volatile unsigned int rx_stat_frm_1518_good_crc_1; volatile unsigned int rx_stat_frm_64_0; volatile unsigned int rx_stat_frm_64_1; //0x1D8 volatile unsigned int rx_stat_frm_65_127_0; volatile unsigned int rx_stat_frm_65_127_1; volatile unsigned int rx_stat_frm_128_255_0; volatile unsigned int rx_stat_frm_128_255_1; //0x1E8 volatile unsigned int rx_stat_frm_256_511_0; volatile unsigned int rx_stat_frm_256_511_1; volatile unsigned int rx_stat_frm_512_1023_0; volatile unsigned int rx_stat_frm_512_1023_1; //0x1F8 volatile unsigned int rx_stat_frm_1024_1518_0; volatile unsigned int rx_stat_frm_1024_1518_1; volatile unsigned int rx_stat_frm_1519_2047_0; volatile unsigned int rx_stat_frm_1519_2047_1; //0x208 volatile unsigned int rx_stat_frm_2048_4095_0; volatile unsigned int rx_stat_frm_2048_4095_1; volatile unsigned int rx_stat_frm_4096_9216_0; volatile unsigned int rx_stat_frm_4096_9216_1; //0x218 volatile unsigned int rx_stat_frm_9217_16383_0; volatile unsigned int rx_stat_frm_9217_16383_1; }tsemac_reg_type_t; /** * @brief enum to set speed for tsemac */ enum speed_mode_set { fast_half_duplex_mode = 1, fast_full_duplex_mode, one_g_mode, }; /** * @brief enum for statistics counter register */ enum statistics_counter_reg { tx_unicast_frame_counter_reg = 19, //index value for offset 0x04C tx_multicast_frame_counter_reg = 21, tx_broadcast_frame_counter_reg = 23, tx_badfcs_frame_counter_reg = 25, tx_jumbo_frame_counter_reg = 27, tx_under_run_frame_counter_reg = 29, tx_pause_frame_counter_reg = 31, tx_vlan_tag_frame_counter_reg = 33, tx_frame_length_counter_reg = 35, tx_deferred_transmission_counter_reg = 37, tx_excessive_deferred_transmission_counter_reg = 39, tx_late_collision_counter_reg = 41, tx_excessive_collision_counter_reg = 43, tx_num_early_collision_counter_reg = 45, tx_short_frame_dis_fcs_counter_reg = 47, tx_ptp_1588_frame_counter_reg = 49, tx_frame_length_64_counter_reg = 51, tx_frame_length_65_127_counter_reg = 53, tx_frame_length_128_255_counter_reg = 55, tx_frame_length_256_511_counter_reg = 57, tx_frame_length_512_1023_counter_reg = 59, tx_frame_length_1024_1518_counter_reg = 61, tx_frame_length_1519_2047_counter_reg = 63, tx_frame_length_2048_4095_counter_reg = 65, tx_frame_length_4096_9216_counter_reg = 67, tx_frame_length_9217_16383_counter_reg = 69, rx_frame_length_counter_reg = 71, rx_vlan_tag_frame_counter_reg = 73, rx_pause_frame_counter_reg = 75, rx_control_frame_counter_reg = 77, rx_unsupported_opcode_reg = 79, rx_dribble_nibble_counter_reg = 81, rx_broadcast_frame_counter_reg = 83, rx_multicast_frame_counter_reg = 85, rx_unicast_frame_counter_reg = 87, rx_frame_received_ok_counter_reg = 89, rx_frame_received_length_error_counter_reg = 91, rx_frame_received_crc_error_counter_reg = 93, rx_frame_received_packet_ignored_counter_reg = 95, rx_frame_received_carrier_event_counter_reg = 97, rx_ptp_1588_frame_counter_reg = 99, rx_frame_received_ipg_violation_counter_reg = 101, rx_received_short_frame_counter_reg = 103, rx_received_long_frame_counter_reg = 105, rx_received_undersize_frame_counter_reg = 107, rx_received_frame_fragments_counter_reg = 109, rx_received_frame_jabber_counter_reg = 111, rx_received_frame_length64_good_crc_counter_reg = 113, rx_received_frame_length1518_good_crc_counter_reg = 115, rx_frame_length_64_counter_reg = 117, rx_frame_length_65_127_counter_reg = 119, rx_frame_length_128_255_counter_reg = 121, rx_frame_length_256_511_counter_reg = 123, rx_frame_length_512_1023_counter_reg = 125, rx_frame_length_1024_1518_counter_reg = 127, rx_frame_length_1519_2047_counter_reg = 129, rx_frame_length_2048_4095_counter_reg = 131, rx_frame_length_4096_9216_counter_reg = 133, rx_frame_length_9217_16383_counter_reg = 135, }; unsigned char ethernet_init(tsemac_handle_t *handle); void ethernet_packet_handle(tsemac_handle_t *handle,unsigned int *src_packet,unsigned int *dest_packet); unsigned char ethernet_set_mac_address(tsemac_handle_t *handle); unsigned char ethernet_get_mac_address(tsemac_handle_t *handle); unsigned char ethernet_set_multicast_address(tsemac_handle_t *handle); unsigned char ethernet_get_multicast_address(tsemac_handle_t *handle); unsigned int ethernet_statistics_counter_register_read(tsemac_handle_t *handle,unsigned char counter_reg_offset_enum); unsigned char ethernet_set_speed(tsemac_handle_t *handle); unsigned char ethernet_tx_rx_control_reg_set(tsemac_handle_t *handle,unsigned char bit_pos); unsigned int ethernet_mode_reg_read(tsemac_handle_t *handle); unsigned int ethernet_tx_rx_status_reg_read(tsemac_handle_t *handle); #endif /* ETHERNET_H_ */