The TSEMAC IP core is a 10/100/1000Mbps network interface as per the IEEE 802.3 standard.
It is a complex core containing all necessary logic, interfacing and clocking
infrastructure to allow integrating an external industry-standard Ethernet PHY
with an internal processor, with minimal overhead.
LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T, LAV-AT-500E
| 1.4.0 | Added Statistic Counters. |
| 1.3.0 | Added Avant support. |
| 1.2.0 | Added LFMXO5 support. |
| 1.1.0 | Added LFCPNX device support Added RGMII interface |
| 1.0.1 | Added LFD2NX device support Added AXI4-stream interface |
| 1.0.0 | Initial release |