The TSMAC IP core is a 10/100/1G network interface soft IP for the Jedi platform.
It is a complex core containing all necessary logic, interfacing and clocking
infrastructure to allow integrating an external industry-standard Ethernet PHY
with an internal processor, with minimal overhead.
LIFCL
| 1.0.0 | Preliminary release. |
| Known issue: When LSE is used as Synthesis Tool, the Post-PAR simulation will fail. It is recommended to use Synplify Pro instead to avoid this issue. |
| Bug number: DNG-8622 |