The Lattice Semiconductor SubLVDS Image Sensor Receiver Submodule IP converts double data rate interface to pixel clock domain.The subLVDS interface is primarily used in image sensors. It has one clock pair and more than one data pairs. The number of data pairs varies, depending on bandwidth requirement.
LIFCL-40, LIFCL-33, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T, LAV-AT-500E
| 1.3.0 |
Added Propel support. Added Lattice Avant support. Added Lane Width 14. Added contraint file. |
| 1.2.0 |
Added LFMXO5-25 support. Added Lane Widths 12 and 16. |
| 1.1.1 | Fixed clock constraint. |
| 1.1.0 | Added CertusPro-NX support. |
| 1.0.3 | Updated Testbench. |
| 1.0.2 | Minor Fixes. |
| 1.0.1 | Updated for SP1. |
| 1.0.0 | Initial release. |