/* ================================================================== >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< ------------------------------------------------------------------ Copyright (c) 2006-2018 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ IMPORTANT: THIS FILE IS AUTO-GENERATED BY LATTICE RADIANT Software. Permission: Lattice grants permission to use this code pursuant to the terms of the Lattice Corporation Open Source License Agreement. Disclaimer: Lattice provides no warranty regarding the use or functionality of this code. It is the user's responsibility to verify the user Software design for consistency and functionality through the use of formal Software validation methods. ------------------------------------------------------------------ Lattice Semiconductor Corporation 111 SW Fifth Avenue, Suite 700 Portland, OR 97204 U.S.A Email: techsupport@latticesemi.com Web: http://www.latticesemi.com/Home/Support/SubmitSupportTicket.aspx ================================================================== */ #ifndef SPI_SLAVE_REGS_H #define SPI_SLAVE_REGS_H #define SPI_SLAVE_WR_DATA (0x00) #define SPI_SLAVE_RD_DATA (0x00) #define SPI_SLAVE_CFG (0x01*4) #define SPI_SLAVE_SS_POL (0x40) #define SPI_SLAVE_DATA_WIDTH_MASK (0x30) #define SPI_SLAVE_LSB_FIRST (0x08) #define SPI_SLAVE_DAISY_CHAIN (0x04) #define SPI_SLAVE_CPOL (0x02) #define SPI_SLAVE_CPHA (0x01) #define SPI_SLAVE_INT_STATUS (0x02*4) #define SPI_SLAVE_INT_ENABLE (0x03*4) #define SPI_SLAVE_INT_SET (0x04*4) #define SPI_SLAVE_FIFO_STATUS (0x09*4) #define SPI_SLAVE_MISO_STATIC_VALUE (0x0A*4) #define SPI_SLAVE_RX_FIFO_EMPTY (0x01) #define SPI_SLAVE_TX_FIFO_FULL (0x20) #define SPI_SLAVE_INT_TR_COMPLETE (0x80) #define SPI_SLAVE_INT_TX_BUFFER_FULL (0x20) #define SPI_SLAVE_INT_TX_BUFFER_AEMPT (0X10) #define SPI_SLAVE_INT_TX_BUFFER_EMPT (0x08) #define SPI_SLAVE_INT_RX_BUFFER_FULL (0x04) #define SPI_SLAVE_INT_RX_BUFFER_AFULL (0x02) #define SPI_SLAVE_INT_RX_BUFFER_READY (0x01) #define SPI_SLAVE_BYTE_COUNT (0x05*4) #define SPI_SLAVE_BYTE_COUNT_RST (0x06*4) #define SPI_SLAVE_TARGET_WORD_COUNT (0x07*4) #define SPI_SLAVE_FIFO_RST (0x08*4) #define SPI_SLAVE_TX_FIFO_RST (0x02) #define SPI_SLAVE_RX_FIFO_RST (0x01) #endif