/* ================================================================== >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< ------------------------------------------------------------------ Copyright (c) 2006-2018 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ IMPORTANT: THIS FILE IS AUTO-GENERATED BY LATTICE RADIANT Software. Permission: Lattice grants permission to use this code pursuant to the terms of the Lattice Corporation Open Source License Agreement. Disclaimer: Lattice provides no warranty regarding the use or functionality of this code. It is the user's responsibility to verify the user Software design for consistency and functionality through the use of formal Software validation methods. ------------------------------------------------------------------ Lattice Semiconductor Corporation 111 SW Fifth Avenue, Suite 700 Portland, OR 97204 U.S.A Email: techsupport@latticesemi.com Web: http://www.latticesemi.com/Home/Support/SubmitSupportTicket.aspx ================================================================== */ #ifndef SPI_MASTER_H #define SPI_MASTER_H #include #include #define SPI_MASTER_INST_BASE_ADDR 0x00009000 #define SPI_SLAVE_INST_BASE_ADDR 0x00009400 #define SPI_SLAVE_0 0x01 #define SPI_SLAVE_1 0x02 #define SPI_SLAVE_2 0x04 #define SPI_SLAVE_3 0x08 #define SPI_SLAVE_4 0x10 #define SPI_SLAVE_5 0x20 #define SPI_SLAVE_6 0x40 #define SPI_SLAVE_7 0x80 typedef enum { SPIM_STATE_IDLE = 0, SPIM_STATE_READ, SPIM_STATE_WRITE, SPIM_STATE_TIMEOUT, SPIM_STATE_ERROR = 0xFF }spim_state; typedef enum { SPIM_DATA_WIDTH_8BIT = 0, SPIM_DATA_WIDTH_16BIT, SPIM_DATA_WIDTH_24BIT, SPIM_DATA_WIDTH_32BIT, }spim_data_width; struct spim_instance { const char* instance_name; uint32_t base_address; // spi master base address assigned uint8_t data_width; // uint8_t slave_count; // number of slave select lines uint16_t sys_clk; // system clock frequency 10-400Mhz uint16_t spi_desired_clk; // 0.01-100Mhz uint16_t clk_prescaler; // system clock divider uint16_t spi_actual_clk; // actual clock = system clock /(clock prescable x 2) uint8_t interrupts_en_bits; // TX_BUFFER_EMPTY, TX_BUFFER_NOT_FULL, // RX_BUFFER_NOT_EMPTY, RX_BUFFER_FULL uint8_t spi_clk_polarity; // uint8_t spi_clk_phase; // // bool is_tx_buf_not_full; // // bool is_rx_buf_not_empty; // uint8_t spim_current_state; // IDLE, READ, WRITE, }; /* ***************************************************************************** * * uint_8 spi_master_init(struct spim_instance* this_spim, * uint32_t base_addr, * uint8_t spi_mode, * uint8_t interrupts_en) * * performs spi master block initialization * * Note: This function initializes the spi master block * * * Arguments: * struct spim_instance* this_spim: spi master instance * uint32_t base_addr : base address of the spi master * uint8_t spi_mode : spi mode: 00-standard mode up to 100K * 01-fast mode up to 400K * 10-high speed mode, up to 5M * uint8_t interrupts_en : enabled interrupt bits * * Return Value: * int: * * ***************************************************************************** */ uint8_t spi_master_init(struct spim_instance *this_spim, uint32_t base_addr, uint8_t slave_count, uint8_t data_width, uint8_t clk_polarity, uint8_t clk_phase, uint8_t interrupts_en); /* ***************************************************************************** * * uint8_t spi_master_config(struct spim_instance *this_spim, * spim_data_width data_width, * uint16_t prescaler, * uint8_t clk_polarity, uint8_t clk_phase) * * performs spi master block initialization * * Note: This function config the spi master block * * * Arguments: * struct spim_instance* this_spim: spi master instance * spim_data_width data_width : 00 - 8 bit * 01 - 16 bit * 10 - 24 bit * 11 - 32 bit * uint16_t prescaler : prescaler to configure the clock * * uint8_t clk_polarity : polarity of the clock * uint8_t clk_phase : clock phase * * Return Value: * int: * * ***************************************************************************** */ uint8_t spi_master_config(struct spim_instance *this_spim, spim_data_width data_width, uint16_t prescaler, uint8_t clk_polarity, uint8_t clk_phase, uint8_t ssnp); /* ***************************************************************************** * * uint8_t spi_master_write(struct spim_instance* this_spim, * uint16_t address, * uint8_t buffer_size, * uint8_t *data_buffer) * * performs spi master write operation * * Note: This function perform the spi master write operation * * * Arguments: * struct spim_instance* this_spim: spi master instance * uint16_t address : address of the slave device * uint8_t buffer_size : number of bytes to write * uint8_t *data_buffer : pointer to data buffer * * Return Value: * int: * * ***************************************************************************** */ uint8_t spi_master_transfer(struct spim_instance *this_spim, uint32_t *data_buffer_out, uint32_t byte_out_size, uint32_t *data_buffer_in, uint32_t byte_in_size); uint8_t spi_device_select(struct spim_instance *this_spim, uint8_t enable_slave); void spi_master_isr(void *ctx); #endif /*spi Master Header File*/