The SPI Master Controller IP provides a bridge between LMMI/AHB-Lite/APB interface and standard external SPI bus interface.
LIFCL
| 1.0.0 | Preliminary release. |
| Desired SCLK Frequency maximum value is limited to 'System Clock Frequency'/6. It should be 'System Clock Frequency'/4 as documented in the User Guide. The IP Core will be updated to match the User Guide in the next release. |