<?xml version="1.0"?>
<lsccip:ip version="1.0"
           xmlns:lsccip="http://www.latticesemi.com/XMLSchema/Radiant/ip"
           xmlns:xi="http://www.w3.org/2001/XInclude">

  <lsccip:general>
    <lsccip:vendor>latticesemi.com</lsccip:vendor>
    <lsccip:library>ip</lsccip:library>
    <lsccip:name>spi_controller</lsccip:name>
    <lsccip:display_name>SPI Controller</lsccip:display_name>
    <lsccip:version>2.4.1</lsccip:version>
    <lsccip:category>Processors_Controllers_and_Peripherals</lsccip:category>
    <lsccip:keywords>BusType_AHB-Lite,BusType_APB</lsccip:keywords>
    <lsccip:min_radiant_version>2.1</lsccip:min_radiant_version>
    <lsccip:supported_products>
	<lsccip:supported_family name="LIFCL"/>
	   <lsccip:supported_family name="LFD2NX"/>
	   <lsccip:supported_family name="LFCPNX"/>
	   <lsccip:supported_family name="LFMXO5"/>
	   <lsccip:supported_family name="LATG1"/>
	   <lsccip:supported_family name="UT24C"/>
	   <lsccip:supported_family name="UT24CP"/>
	   <lsccip:supported_family name="LAV-AT"/>
	   <lsccip:supported_family name="kr6a00"/>
	   <lsccip:supported_family name="LKH-CT"/>
	   <lsccip:supported_family name="LKH-MH"/>
	   <lsccip:supported_family name="LN2-CT"/>
	   <lsccip:supported_family name="LN2-MH"/>
</lsccip:supported_products>
    <lsccip:supported_platforms>
      <lsccip:supported_platform name="radiant"/>
      <lsccip:supported_platform name="esi"/>
    </lsccip:supported_platforms>
  </lsccip:general>

  <lsccip:settings>
    <lsccip:setting id                 = "INTERFACE"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "string"
                    title              = "Interface"
                    options            = "['LMMI', 'APB', 'AHBL']"
                    default            = "AHBL"
                    group1             = "General"
                    />

    <!-- General -->
    <lsccip:setting id                 = "SLAVE_COUNT"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Number of Chip Select Lines"
                    value_range        = "(1, 8)"
                    default            = "1"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "FAMILY"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "string"
                    default            = "LIFCL"
                    value_expr         = "get_device_name(1)"
                    editable           = "False"
                    hidden             = "True"
                    title              = "Device Architecture"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "LSB_FIRST"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "First Transmitted Bit"
                    options            = "[('MSB', 0), ('LSB', 1)]"
                    default            = "0"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "ONLY_WRITE"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Read-Write Operation"
                    options            = "[('Read and Write', 0), ('Write Only', 1)]"
                    default            = "0"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "DATA_WIDTH"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Data Width"
                    options            = "[8, 16, 24, 32]"
                    default            = "32"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "DATA_WIDTH_RESET"
                    type               = "param"
                    conn_mod           = "lscc_spi_slave"
                    value_type         = "int"
                    title              = "Data Width Reset"
                    value_expr         = "ext_get_data_width_reset(DATA_WIDTH)"
                    hidden             = "True"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "SSNP"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Chip Select Pulse mode"
                    options            = "[('Non Pulse', 0), ('Pulse', 1)]"
                    default            = "1"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "CPOL"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "SPI Clock Polarity"
                    options            = "[0, 1]"
                    default            = "0"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "CPHA"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "SPI Clock Phase"
                    options            = "[0, 1]"
                    default            = "0"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "slv_sel_pol"
                    type               = "input"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "string"
                    title              = "Chip Select Polarity (0x)"
                    default            = "00"
                    drc                = "ext_slave_sel_pol_drc(slv_sel_pol)"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "SSPOL"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "string"
                    default            = "8'h00"
                    editable           = "False"
                    value_expr         = "ext_get_sspol_val(slv_sel_pol)"
                    output_formatter   = "nostr"
                    hidden             = "True"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "SPI_EN_IN"
                    type               = "input"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "bool"
                    title              = "SPI Enable Register"
                    default            = "False"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "SPI_EN"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    value_expr         = "1 if (SPI_EN_IN) else 0"
                    title              = "SPI Enable Register"
                    default            = "0"
                    editable           = "False"
                    hidden             = "True"
                    group1             = "General"
                    />

    <lsccip:setting id                 = "BB_PRIM_EN"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "bool"
                    title              = "Include I/O Buffer"
                    default            = "False"
                    group1             = "General"
                    />

    <!-- FIFO -->
    <lsccip:setting id                 = "FIFO_WIDTH"
                    type               = "input"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "FIFO Width"
                    value_expr         = "DATA_WIDTH"
                    editable           = "False"
                    group1             = "FIFO"
                    />

    <lsccip:setting id                 = "FIFO_DEPTH"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "FIFO Depth"
                    options            = "[16, 32, 64, 128, 256, 512]"
                    default            = "16"
                    group1             = "FIFO"
                    />

    <lsccip:setting id                 = "FIFO_IMPL"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "string"
                    title              = "Implementation of FIFO"
                    options            = "['EBR', 'LUT']"
                    default            = "EBR"
                    group1             = "FIFO"
                    />

    <lsccip:setting id                 = "TX_FIFO_AE_FLAG"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "TX FIFO Almost Empty Flag"
                    value_range        = "(1, FIFO_DEPTH-1)"
                    drc                = "ext_check_flag(TX_FIFO_AE_FLAG, FIFO_DEPTH)"
                    default            = "3"
                    group1             = "FIFO"
                    />

    <lsccip:setting id                 = "RX_FIFO_AF_FLAG"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "RX FIFO Almost Full Flag"
                    value_range        = "(1, FIFO_DEPTH-1)"
                    drc                = "ext_check_flag(RX_FIFO_AF_FLAG, FIFO_DEPTH)"
                    default            = "12"
                    group1             = "FIFO"
                    />

    <!-- Clock -->
    <lsccip:setting id                 = "SYS_CLOCK_FREQ"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "float"
                    title              = "System Clock Frequency (MHz)"
                    value_range        = "(10, 200)"
                    default            = "50"
                    group1             = "Clock"
                    />

    <lsccip:setting id                 = "DESIRED_CLOCK_FREQ"
                    type               = "input"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "float"
                    title              = "Desired SCLK Frequency (MHz)"
                    value_range        = "(0.01, 50)"
                    default            = "0.1"
                    drc                = "ext_check_desired_clock_freq(SYS_CLOCK_FREQ, DESIRED_CLOCK_FREQ)"
                    group1             = "Clock"
                    />

    <lsccip:setting id                 = "PRESCALER_INPUT"
                    type               = "input"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Clock Prescaler"
                    value_range        = "(2, 65535)"
                    value_expr         = "ext_calc_clock_prescaler(SYS_CLOCK_FREQ, DESIRED_CLOCK_FREQ)"
                    editable           = "False"
                    group1             = "Clock"
                    />

    <lsccip:setting id                 = "PRESCALER"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "int"
                    title              = "Clock Prescaler (param)"
                    value_range        = "(2, 65535)"
                    value_expr         = "PRESCALER_INPUT"
                    editable           = "False"
                    group1             = "Clock"
                    hidden             = "True"
                    />

    <lsccip:setting id                 = "ACTUAL_CLOCK_FREQ"
                    type               = "param"
                    conn_mod           = "lscc_spi_master"
                    value_type         = "float"
                    title              = "SPI Actual Clock Frequency (MHz)"
                    value_expr         = "ext_calc_actual_clock_freq(SYS_CLOCK_FREQ, PRESCALER_INPUT)"
                    editable           = "False"
                    group1             = "Clock"
                    />
  </lsccip:settings>

  <lsccip:ports>
  <!-- SPI Master input -->
  <lsccip:port name      = "miso_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "miso_i"
               />

  <!-- SPI Master outputs -->
  <lsccip:port name      = "sclk_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "sclk_o"
               />

  <lsccip:port name      = "mosi_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "mosi_o"
               />

  <lsccip:port name      = "ssn_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "ssn_o"
               range     = "(SLAVE_COUNT - 1, 0)"
               />

  <!-- LMMI inputs -->
  <lsccip:port name      = "clk_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "clk_i"
               />

  <lsccip:port name      = "rst_n_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "rst_n_i"
               />

  <lsccip:port name      = "lmmi_request_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_request_i"
               stick_low = "INTERFACE != 'LMMI'"
               />

  <lsccip:port name      = "lmmi_wr_rdn_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_wr_rdn_i"
               stick_low = "INTERFACE != 'LMMI'"
               />

  <lsccip:port name      = "lmmi_offset_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_offset_i"
               range     = "(3, 0)"
               stick_low = "INTERFACE != 'LMMI'"
               />

  <lsccip:port name      = "lmmi_wdata_i"
               dir       = "in"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_wdata_i"
               range     = "(DATA_WIDTH - 1, 0)"
               stick_low = "INTERFACE != 'LMMI'"
               />

  <!-- LMMI outputs -->
  <lsccip:port name      = "lmmi_rdata_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_rdata_o"
               range     = "(DATA_WIDTH - 1, 0)"
               dangling  = "INTERFACE != 'LMMI'"
               />

  <lsccip:port name      = "lmmi_rdata_valid_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_rdata_valid_o"
               dangling  = "INTERFACE != 'LMMI'"
               />

  <lsccip:port name      = "lmmi_ready_o"
               dir       = "out"
               conn_mod  = "lscc_spi_master"
               conn_port = "lmmi_ready_o"
               dangling  = "INTERFACE != 'LMMI'"
               />

  <!-- LINTR output -->
  <lsccip:port name          = "int_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "int_o"
               bus_interface = "INTR"
               />

  <!-- AHB-Lite inputs -->
  <lsccip:port name          = "ahbl_hsel_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hsel_i"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hready_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hready_i"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_haddr_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_haddr_i"
               range         = "(5, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hburst_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hburst_i"
               range         = "(2, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hsize_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hsize_i"
               range         = "(2, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hmastlock_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hmastlock_i"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hprot_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hprot_i"
               range         = "(3, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_htrans_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_htrans_i"
               range         = "(1, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hwrite_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hwrite_i"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hwdata_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hwdata_i"
               range         = "(31, 0)"
               stick_low     = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <!-- AHB-Lite outputs -->
  <lsccip:port name          = "ahbl_hreadyout_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hreadyout_o"
               dangling      = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hresp_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hresp_o"
               dangling      = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <lsccip:port name          = "ahbl_hrdata_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "ahbl_hrdata_o"
               range         = "(31, 0)"
               dangling      = "INTERFACE != 'AHBL'"
               bus_interface = "AHBL_S0"
               />

  <!-- APB inputs -->

  <lsccip:port name          = "apb_penable_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_penable_i"
               stick_low     = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_psel_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_psel_i"
               stick_low     = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_pwrite_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_pwrite_i"
               stick_low     = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_paddr_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_paddr_i"
               range         = "(5, 0)"
               stick_low     = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_pwdata_i"
               dir           = "in"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_pwdata_i"
               range         = "(31, 0)"
               stick_low     = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

<!-- APB outputs -->
  <lsccip:port name          = "apb_pready_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_pready_o"
               dangling      = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_pslverr_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_pslverr_o"
               dangling      = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />

  <lsccip:port name          = "apb_prdata_o"
               dir           = "out"
               conn_mod      = "lscc_spi_master"
               conn_port     = "apb_prdata_o"
               range         = "(31, 0)"
               dangling      = "INTERFACE != 'APB'"
               bus_interface = "APB_S0"
               />
  </lsccip:ports>

  <xi:include href="bus_interface.xml" parse="xml" />
  <xi:include href="memory_map.xml" parse="xml" />

  <lsccip:componentGenerators>
    <lsccip:componentGenerator>
      <lsccip:name>create_constraint_file</lsccip:name>
      <lsccip:generatorExe>eval/create_constraint.py</lsccip:generatorExe>
    </lsccip:componentGenerator>
  </lsccip:componentGenerators>

  <!-- spi_master_v2_common_sip_14 -->
</lsccip:ip>