/*   ==================================================================

     >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
     ------------------------------------------------------------------
     Copyright (c) 2019-2020 by Lattice Semiconductor Corporation
     ALL RIGHTS RESERVED
     ------------------------------------------------------------------

       IMPORTANT: THIS FILE IS USED BY OR GENERATED BY the LATTICE PROPEL™
       DEVELOPMENT SUITE, WHICH INCLUDES PROPEL BUILDER AND PROPEL SDK.

       Lattice grants permission to use this code pursuant to the
       terms of the Lattice Propel License Agreement.

     DISCLAIMER:

    LATTICE MAKES NO WARRANTIES ON THIS FILE OR ITS CONTENTS,
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    LATTICE DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED HEREIN WILL MEET
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    OR THAT DEFECTS HEREIN WILL BE CORRECTED.
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    ARISING OUT OF THE USE OF THIS FILE OR ITS CONTENTS,
    EVEN IF LATTICE HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
    LATTICE 'S SOLE LIABILITY, AND LICENSEE' S SOLE REMEDY,
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     ------------------------------------------------------------------

     ================================================================== */
#include "qspi_streamer.h"
#include <stdlib.h>

unsigned char spi_wip(volatile struct spi_streamer *SPIMaster)
{
	unsigned int status;
//    volatile struct spi_streamer *SPIMaster = (struct spi_streamer *)this_spi->base_addr;
	if (NULL == SPIMaster) {
		return 1;
	}
	do {
		//Read status command
		SPIMaster->cmd_data = 0x05 << 24;;
		SPIMaster->ph4_num_bytes = 2;
		SPIMaster->trans_ctrl =
		    (1 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;

		while (SPIMaster->status & STRMR_STAT_BUSY);

		status = SPIMaster->rx_fifo_data;

	} while (status & 0x00010000);

	return 0;
}

unsigned char spi_streamer_init(struct spi_streamer_instance *this_spi,
				unsigned int base_addr,
				unsigned int spi_mode,
				unsigned int sck_div)
{
	volatile struct spi_streamer *SPIMaster;
	if (NULL == this_spi) {
		return 1;
	}
	this_spi->instance_name = "";
	this_spi->base_addr = base_addr;
	SPIMaster = (volatile struct spi_streamer *) base_addr;
	SPIMaster->control = spi_mode| sck_div;
	return 0;
}

unsigned char spi_write(struct spi_streamer_instance *this_spi,
			unsigned int addr, unsigned int length,
			unsigned char *buff, unsigned char addr4B)
{
	unsigned int command;
	unsigned int i;
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;
	if (NULL == this_spi) {
		return 1;
	}
	//WriteEn command
	SPIMaster->cmd_data = 0x06 << 24;
	SPIMaster->ph4_num_bytes = 0;
	SPIMaster->trans_ctrl =
	    (1 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;

	while (SPIMaster->status & STRMR_STAT_BUSY);

	if (addr4B) {
		command = (0x12 << 24);
		SPIMaster->cmd_data = command;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_TX;
		SPIMaster->ph4_num_bytes = 0;
		SPIMaster->tx_fifo_data = addr;
		for (i = 0; i < length; i = i + 4) {
			SPIMaster->tx_fifo_data =
			    (buff[i] << 24) | (buff[i + 1] << 16) |
			    (buff[i + 2] << 8) | buff[i + 3];
		}
		SPIMaster->trans_ctrl =
		    (1 << TRANS_PH1_NUMBYTES_OFFSET) | ((length + 4) <<
							TRANS_PH2_NUMBYTES_OFFSET)
		    | TRANS_START;
	} else {
		command = (0x02 << 24) | addr;
		SPIMaster->cmd_data = command;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_TX;
		SPIMaster->ph4_num_bytes = 0;
		for (i = 0; i < length; i = i + 4) {
			SPIMaster->tx_fifo_data =
			    (buff[i] << 24) | (buff[i + 1] << 16) |
			    (buff[i + 2] << 8) | buff[i + 3];
		}
		SPIMaster->trans_ctrl =
		    (4 << TRANS_PH1_NUMBYTES_OFFSET) | (length <<
							TRANS_PH2_NUMBYTES_OFFSET)
		    | TRANS_START;
	}

	while (SPIMaster->status & STRMR_STAT_BUSY);

	spi_wip(SPIMaster);

	return 0;
}

unsigned char spi_read(struct spi_streamer_instance *this_spi,
		       unsigned int addr, unsigned int length,
		       unsigned char *buff, unsigned char addr4B)
{
	unsigned int command;
	unsigned int rxdata;
	unsigned int i;
	if (NULL == this_spi) {
		return 1;
	}
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;

	if (addr4B) {
		command = (0x13 << 24);
		SPIMaster->cmd_data = command;
		SPIMaster->tx_fifo_data = addr;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_RX;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_RX_DEST_INT;
		SPIMaster->ph4_num_bytes = length;
		SPIMaster->trans_ctrl =
		    (1 << TRANS_PH1_NUMBYTES_OFFSET) | (4 <<
							TRANS_PH2_NUMBYTES_OFFSET)
		    | TRANS_RXFIFO_LAST_EN | TRANS_START;
	} else {
		command = (0x03 << 24) | addr;
		SPIMaster->cmd_data = command;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_RX;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_RX_DEST_INT;
		SPIMaster->ph4_num_bytes = length;
		SPIMaster->trans_ctrl =
		    (4 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;
	}

	while (SPIMaster->status & STRMR_STAT_BUSY);

	for (i = 0; i < length;) {

		rxdata = SPIMaster->rx_fifo_data;
		buff[i++] = rxdata >> 24;
		buff[i++] = rxdata >> 16;
		buff[i++] = rxdata >> 8;
		buff[i++] = rxdata;

	}

	return 0;
}

//void spiRead2ESB (struct spi_streamer_instance *this_spi, unsigned int addr, unsigned int length, unsigned char addr4B)
unsigned char spi_read_esb(void *this_spi_streamer, unsigned int addr,
			   unsigned int length, unsigned char addr4B)
{
	unsigned int command;
	if (NULL == this_spi_streamer) {
		return 1;
	}
	volatile struct spi_streamer_instance *this_spi =
	    (struct spi_streamer_instance *) this_spi_streamer;
	volatile struct spi_streamer *SPIMaster =
	    (volatile struct spi_streamer *) (this_spi->base_addr);

//      esbMuxPort(ESB_PORT_HSP);

	if (addr4B) {
		command = (0x13 << 24);
		SPIMaster->cmd_data = command;
		SPIMaster->tx_fifo_data = addr;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_RX;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_RX_DEST_EXT;
		SPIMaster->ph4_num_bytes = length;
		SPIMaster->trans_ctrl =
		    (1 << TRANS_PH1_NUMBYTES_OFFSET) | (4 <<
							TRANS_PH2_NUMBYTES_OFFSET)
		    | TRANS_RXFIFO_LAST_EN | TRANS_START;
	} else {
		command = (0x03 << 24) | addr;
		SPIMaster->cmd_data = command;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_FLUSH_RX;
		SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_RX_DEST_EXT;
		SPIMaster->ph4_num_bytes = length;
		SPIMaster->trans_ctrl =
		    (4 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_RXFIFO_LAST_EN
		    | TRANS_START;
	}

	while (SPIMaster->status & STRMR_STAT_BUSY);

//      esbMuxPort(ESB_PORT_WISHBONE);

	return 0;
}

unsigned char spi_erase_4k(struct spi_streamer_instance *this_spi,
			   unsigned int addr, unsigned char addr4B)
{
	unsigned int command;
	if (NULL == this_spi) {
		return 1;
	}
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;

	//WriteEn command
	SPIMaster->cmd_data = 0x06 << 24;;
	SPIMaster->ph4_num_bytes = 0;
	SPIMaster->trans_ctrl =
	    (1 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;

	while (SPIMaster->status & STRMR_STAT_BUSY);

	if (addr4B) {
		command = (0x21 << 24);
		SPIMaster->cmd_data = command;
		SPIMaster->tx_fifo_data = addr;
		SPIMaster->ph4_num_bytes = 0;
		SPIMaster->trans_ctrl =
		    (1 << TRANS_PH1_NUMBYTES_OFFSET) | (4 <<
							TRANS_PH2_NUMBYTES_OFFSET)
		    | TRANS_START;
	} else {
		command = (0x20 << 24) | addr;
		SPIMaster->cmd_data = command;
		SPIMaster->ph4_num_bytes = 0;
		SPIMaster->trans_ctrl =
		    (4 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;
	}

	while (SPIMaster->status & STRMR_STAT_BUSY);

	spi_wip(SPIMaster);

	return 0;
}

unsigned char spi_write_txfifo(struct spi_streamer_instance *this_spi,
			       unsigned int addr, unsigned int length)
{
	unsigned int command;
	unsigned int i;
	if (NULL == this_spi) {
		return 1;
	}
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;

	//WriteEn command
	SPIMaster->cmd_data = 0x06 << 24;
	SPIMaster->fifo_ctrl = 0;
	SPIMaster->ph4_num_bytes = 0;
	SPIMaster->trans_ctrl =
	    (1 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;

	while (SPIMaster->status & STRMR_STAT_BUSY);

	command = (0x02 << 24) | addr;

	//Write
	SPIMaster->cmd_data = command;
	SPIMaster->ph4_num_bytes = 0;
	SPIMaster->trans_ctrl =
	    (4 << TRANS_PH1_NUMBYTES_OFFSET) | (length <<
						TRANS_PH2_NUMBYTES_OFFSET)
	    | TRANS_START;

	while (SPIMaster->status & STRMR_STAT_BUSY);

	spi_wip(SPIMaster);

	return 0;
}

unsigned char spi_read_txfifo(struct spi_streamer_instance *this_spi,
			      unsigned int addr, unsigned int length)
{
	unsigned int command;
	unsigned int rxdata;
	unsigned int i;
	if (NULL == this_spi) {
		return 1;
	}
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;

	command = (0x03 << 24) | addr;

	SPIMaster->cmd_data = command;
	SPIMaster->fifo_ctrl =
	    STRMR_FIFO_CTRL_FLUSH_RX | STRMR_FIFO_CTRL_FLUSH_TX;
	SPIMaster->fifo_ctrl = STRMR_FIFO_CTRL_RX_DEST_TX;
	SPIMaster->ph4_num_bytes = length;
	SPIMaster->trans_ctrl =
	    (4 << TRANS_PH1_NUMBYTES_OFFSET) | TRANS_START;

	while (SPIMaster->status & STRMR_STAT_BUSY);

	return 0;
}

#define STRMR_IRQ_DONE					(1 << 0)
#define STRMR_IRQ_TX_FIFO_EMPTY			(1 << 1)
#define STRMR_IRQ_TX_FIFO_ALMOST_EMPTY	(1 << 2)
#define STRMR_IRQ_TX_FIFO_ALMOST_FULL	(1 << 3)
#define STRMR_IRQ_TX_FIFO_FULL			(1 << 4)
#define STRMR_IRQ_RX_FIFO_EMPTY			(1 << 5)
#define STRMR_IRQ_RX_FIFO_ALMOST_EMPTY	(1 << 6)
#define STRMR_IRQ_RX_FIFO_ALMOST_FULL	(1 << 7)
#define STRMR_IRQ_RX_FIFO_FULL			(1 << 8)

void qspi_stramer_isr(unsigned int intr_level, void *ctx)
{
	unsigned int intr_status;
	struct spi_streamer_instance *this_spi =
	    (struct spi_streamer_instance *) ctx;
	volatile struct spi_streamer *SPIMaster =
	    (struct spi_streamer *) this_spi->base_addr;

	intr_status = SPIMaster->irq_status & this_spi->irq_en;
	SPIMaster->irq_set = intr_status;

}