QSPI Flash Controller

Description

A Quad Serial Peripheral Interface (QSPI) is a four-tri-state data line serial interface that is commonly used to program, erase, and read SPI Flash memories. QSPI enhances the throughput of a standard SPI by four times since four bits are transferred every clock cycle.The following QSPI features are supported:

• Supports Different bus interfaces:
• AMBA AXI4 Protocol
• AMBA AXI4-Lite Protocol
• Supports Scalable performance: 1x, 2x, 4x I/O widths
• Supports Outward reset pin option
• Supports Programmable SPI clock phase and polarity
• Supports Programmable serial clock frequency
• Supports Optional use of transmit and receive FIFOs with configurable FIFO Depth
• Supports RISC V QSPI code little endian and code execution
• Supports Big and little-endian support
• Supports flash commands that allow access and control to configuration, function and other write registers.
• Supports Internal decoding of SPI flash instructions
• Supports Execute In Place support using generic packet structure (Configurable execute In Place mode of operation)
• Supports Configurable SPI mode/protocols with the following interfaces:
• Standard SPI – SCK, SS, DI, DO
• Dual SPI – SCK, SS, IO0, IO1
• Quad SPI – SCK, SS, IO0, IO1, IO2, IO3
• Supports Standard SPI modes:
• Controller mode only
• MSB or LSB first transaction
• Local loopback capability for testing
• Multiple controller and multiple target environment
• Supports Dual and Quad SPI modes:
• Controller mode only
• MSB first transaction
• SPI transfer length of 8-bits only
• Multiple controller and multiple target environment
• Supports Interrupt capability
• Supports CertusPro-NX Device
• Supports Supported system and SPI Clock frequency: 125MHz for Lattice CertusProTM-NX devices

Devices Supported

LFCPNX-100

References

• User Guide
• QSPI API Reference Guide

Revision History