The Lattice Semiconductor Pixel-to-Byte Converter IP converts a standard parallel video interface to DSI or CSI-2 data.
Crosslink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant, Certus-N2
| 1.9.0 |
IP Release Notes |
| 1.8.0 |
Added Certus-N2 support. |
| 1.7.0 |
Added Radiant 2024.1 support. Added APB support. Added support for AXI4-Stream Transmitter and Receiver Interface. Added FIFO configurability in GUI. Added optional enabling/disabling line start/end short packets for CSI-2. |
| 1.6.0 |
Added Radiant 2023.2 support. Added support for Avant devices. |
| 1.4.0 |
Added support for MachXO5 Added new configurations for 4 pixel per clock input. Added LIFCL-33 and LFMXO5-25 in the list of the supported device. |
| 1.3.0 |
Added new configurations for 1 and 2 pixel per clock input. Recoded core modules for different data types. |
| 1.2.0 |
Added Non-Burst Sync pulses support for DSI data types. Added RAW14 and RAW16 CSI-2 data types. Added support for CertusPro-NX |
| 1.1.0 |
Changed the output width and the byte ordering to ordinal sequence. Added support for Certus-NX |
| 1.0.1 | Production release. |
| 1.0.0 | Initial release. |