The Lattice Semiconductor Pixel-to-Byte Converter IP converts a standard parallel video interface to DSI or CSI-2 data.
LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T, LIFCL-33, LAV-AT-E70, LAV-AT-G70, LAV-AT-X70
1.6.0 |
Added Radiant 2023.2 support. Added support for Avant devices. |
1.4.0 |
Added new configurations for 4 pixel per clock input. Added LIFCL-33 and LFMX05-25 in the list of the supported device. |
1.3.0 |
Added new configurations for 1 and 2 pixel per clock input. Recoded core modules for different data types. |
1.2.0 |
Added Non-Burst Sync pulses support for DSI data types. Added RAW14 and RAW16 CSI-2 data types. Added support for CertusPro-NX |
1.1.0 |
Changed the output width and the byte ordering to ordinal sequence. Added support for Certus-NX |
1.0.1 | Production release. |
1.0.0 | Initial release. |