/*   ==================================================================

     >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<<
     ------------------------------------------------------------------
     Copyright (c) 2019-2020 by Lattice Semiconductor Corporation
     ALL RIGHTS RESERVED
     ------------------------------------------------------------------

       IMPORTANT: THIS FILE IS USED BY OR GENERATED BY the LATTICE PROPEL™
       DEVELOPMENT SUITE, WHICH INCLUDES PROPEL BUILDER AND PROPEL SDK.

       Lattice grants permission to use this code pursuant to the
       terms of the Lattice Propel License Agreement.

     DISCLAIMER:

    LATTICE MAKES NO WARRANTIES ON THIS FILE OR ITS CONTENTS,
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    OR THAT DEFECTS HEREIN WILL BE CORRECTED.
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     ================================================================== */

#include "ext_pic.h"
#include "reg_access.h"

volatile struct ext_pic_reg *ext_pic_dev;
//struct ext_interrupt_entry int_table[EXT_INT_NUM];

unsigned char ext_pic_init(struct pic_inst *pic_instance, unsigned int base)
{
	unsigned int idx, a;
	pic_instance->base_addr = base;
	ext_pic_dev = (struct ext_pic_reg *) base;

	/* init interrupt table */
	for (idx = 0; idx < EXT_INT_NUM; idx++) {
		pic_instance->int_table[idx].context = NULL;
		pic_instance->int_table[idx].isr = NULL;
	}

	/*disable/clear all of the external interrupts */
	ext_pic_dev->pic_status = 0xffffffff;
	ext_pic_dev->pic_en = 0;

	/* enable external interrupt */
	//__asm__ __volatile__("csrw mie, %0"::"r"(0x800));

	/* enable interrupts */
	//__asm__ __volatile__("csrw mstatus, %0"::"r"(0x1808));
	return 0;
}

unsigned char ext_pic_int_enable(unsigned char src)
{
	ext_pic_dev->pic_en |= 1 << (src);
	return 0;
}

unsigned char ext_pic_int_disable(unsigned char src)
{
	ext_pic_dev->pic_en &= (~(1 << src));
	return 0;
}

unsigned char ext_pic_int_clear(unsigned char src)
{
	ext_pic_dev->pic_status = 1 << (src);
	return 0;
}

unsigned char ext_pic_int_pending(unsigned char src)
{
	unsigned int ifr = ext_pic_dev->pic_status;

	if (ifr & (1 << src)) {
		return 1;
	}

	return 0;
}

unsigned char ext_pic_int_polarity_set(unsigned char src, unsigned char bit)
{
	/* bit 1 means active low, otherwise,active high */
	if (bit) {
		ext_pic_dev->pic_pol = 1 << src;
	} else {
		ext_pic_dev->pic_pol = 1 << src;
	}
	return 0;
}

unsigned char ext_pic_int_polarity_get(unsigned char src, unsigned char *pol)
{
	unsigned char ret;
	*pol = (ext_pic_dev->pic_pol >> src) & 0x01;
	return 0;
}

unsigned char ext_pic_int_status_get(unsigned int *status)
{
	*status = ext_pic_dev->pic_status;
	return 0;
}

unsigned char ext_pic_isr_register(struct pic_inst *pic_instance, unsigned char src, void (*isr) (void *),
			       void *context)
{
	if (src > EXT_INT_NUM) {
		return 1;
	}
	if (NULL == context) {
		return 1;
	}

	/* register on the isr */
	pic_instance->int_table[src].isr = isr;
	pic_instance->int_table[src].context = context;

	/* mask on the interrupt source */
	ext_pic_int_enable(src);

	return 0;
}

void ext_pic_isr_callback(void *ctx)
{
	int idx;
	struct pic_inst *pic_instance = (struct pic_inst *) ctx;
	for (idx = EXT_INT_PIC0; idx < EXT_INT_NUM; idx++) {
		if (ext_pic_int_pending(idx)) {
			if (pic_instance->int_table[idx].isr) {
				pic_instance->int_table[idx].isr(pic_instance->int_table[idx].context);
			}
			ext_pic_int_clear(idx);
		}
	}

}