LPDDR4 Memory Controller for Nexus Devices

Description

The Lattice Semiconductor LPDDR4 Memory Controller for Nexus Devices provides a turnkey solution consisting of a controller, DDR PHY, and associated clocking and training logic to interface with LPDDR4 SDRAM. The IP Core is implemented in System Verilog HDL using the Lattice Radiant software integrated with the Lattice Synthesis Engine (LSE) and Synplify Pro synthesis tools. The LPDDR4 Memory Controller simplifies the interfacing of CertusPro-NX and MachXO5T-NX devices with external LPDDR4 memory for user applications.

Devices Supported

LFCPNX-100, LFCPNX-100AUTODIE, LFCPNX-50, LFMXO5-55T, LFMXO5-100T

References

• User Guide

• LPDDR4 Memory Controller for Nexus Driver API Reference

• CertusPro-NX Memory Controller Driver User Guide

Release Notes