/* ================================================================== >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< ------------------------------------------------------------------ Copyright (c) 2006-2018 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ IMPORTANT: THIS FILE IS AUTO-GENERATED BY LATTICE RADIANT Software. Permission: Lattice grants permission to use this code pursuant to the terms of the Lattice Corporation Open Source License Agreement. Disclaimer: Lattice provides no warranty regarding the use or functionality of this code. It is the user's responsibility to verify the user Software design for consistency and functionality through the use of formal Software validation methods. ------------------------------------------------------------------ Lattice Semiconductor Corporation 111 SW Fifth Avenue, Suite 700 Portland, OR 97204 U.S.A Email: techsupport@latticesemi.com Web: http://www.latticesemi.com/Home/Support/SubmitSupportTicket.aspx ================================================================== */ #ifndef I3C_SLAVE_H #define I3C_SLAVE_H #include #include struct i3c_slave_instance { uint32_t base_addr; uint8_t init_dyn_addr; uint8_t static_addr; uint8_t bcr; uint8_t dcr; uint64_t pid; uint8_t status; uint8_t trans_mode; uint8_t tx_buf[8]; uint8_t rx_buf[8]; }; //regs #define I3C_SLAVE_BCR_REG 0X00*4 #define I3C_SLAVE_DCR_REG 0X01*4 #define I3C_SLAVE_DYN_ADDR_REG 0X02*4 #define I3C_SLAVE_IBI_HJ_CON 0X03*4 #define I3C_SLAVE_PID5_REG 0X10*4 #define I3C_SLAVE_PID4_REG 0X11*4 #define I3C_SLAVE_PID3_REG 0X12*4 #define I3C_SLAVE_PID2_REG 0X13*4 #define I3C_SLAVE_PID1_REG 0X14*4 #define I3C_SLAVE_PID0_REG 0X15*4 #define I3C_SLAVE_STATIC_ADDR 0X16*4 #define I3C_SLAVE_RECEIVE_FIFO 0X20*4 #define I3C_SLAVE_TRANS_FIFO 0X22*4 #define I3C_SLAVE_SDR_STATUS2 0X38*4 #define I3C_SLAVE_SDR_STATUS1 0X39*4 #define I3C_SLAVE_SDR_RST 0X3C*4 #define I3C_SLAVE_IBI_ACK_FLAG_RST 0X3D*4 #define LMMI_INT_STATUS 0xf0*4 #define RX_FIFO_NOT_EMPT 0x02 #define TX_FIFO_FULL 0x01 #define LMMI_INT_STATUS_EN 0xf1*4 #define LMMI_INT_STATUS_SET 0xf2*4 #define FIFO_STATE 0xF3*4 #define RFIFO_AEMPT 0X08 #define RFIFO_EMPT 0X04 #define TFIFO_AFULL 0X02 #define TFIFO_FULL 0X01 int32_t i3c_slave_init(struct i3c_slave_instance *slave,uint32_t addr,uint8_t bcr,uint8_t dcr,uint64_t pid,uint8_t dyn_addr,uint8_t mode); int32_t i3c_slave_send_data(struct i3c_slave_instance *slave,uint8_t *tx_buf,int32_t tx_length); int32_t i3c_slave_read_data(struct i3c_slave_instance *slave,uint8_t *rx_buf,int32_t rx_length); int32_t i3c_slave_isr(struct i3c_slave_instance *slave); #endif