I2C Target

Description

The I2C Target IP provides a bridge between LMMI/APB interface and standard external I2C bus interface. It supports out-of-band interrupt and configurable transmit and receive FIFO to minimize intervention by the host. The following I2C features are supported:

• 7-bit and 10-bit Addressing Mode
• Different I2C bus speeds: Standard-mode, Fast-mode, Fast-mode Plus
• Clock stretching
• Integrated Pull-up
• Integrated Glitch filter

Devices Supported

Crosslink-NX, Certus-NX, Certus-NX-RT, CertusPro-NX, CertusPro-NX-RT, MachXO5-NX, Avant, Certus-N2

References

• User Guide

• Release Notes