/* ================================================================== >>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< ------------------------------------------------------------------ Copyright (c) 2006-2023 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ IMPORTANT: THIS FILE IS AUTO-GENERATED BY LATTICE RADIANT Software. Permission: Lattice grants permission to use this code pursuant to the terms of the Lattice Corporation Open Source License Agreement. Disclaimer: Lattice provides no warranty regarding the use or functionality of this code. It is the user's responsibility to verify the user Software design for consistency and functionality through the use of formal Software validation methods. ------------------------------------------------------------------ Lattice Semiconductor Corporation 111 SW Fifth Avenue, Suite 700 Portland, OR 97204 U.S.A Email: techsupport@latticesemi.com Web: http://www.latticesemi.com/Home/Support/SubmitSupportTicket.aspx ================================================================== */ #ifndef I2C_SLAVE_REGS_H #define I2C_SLAVE_REGS_H /* * i2c slave register definition */ #define I2C_SLAVE_DATA_BUFFER (0x00) #define I2C_SLAVE_ADDR_LOW (0x01*4) #define I2C_SLAVE_ADDR_HIGH (0x02*4) #define I2C_SLAVE_CTRL (0x03*4) #define I2C_SLAVE_RX_FIFO_RESET (0x40) #define I2C_SLAVE_TX_FIFO_RESET (0x20) #define I2C_SLAVE_NACK_DATA (0x10) #define I2C_SLAVE_NACK_ADDR (0x08) #define I2C_SLAVE_RESET (0x04) #define I2C_SLAVE_SCLK_STRETCH_EN (0x02) #define I2C_SLAVE_10BIT_ADDR_EN (0x01) #define I2C_SLAVE_TARGET_BYTE_COUNT (0x04*4) #define I2C_SLAVE_INT_STATUS (0x05*4) #define I2C_SLAVE_TR_CMP_INT (0x80) #define I2C_SLAVE_STOP_DET_INT (0x40) #define I2C_SLAVE_TX_FIFO_FULL_INT (0x20) #define I2C_SLAVE_TX_FIFO_AEMPTY_INT (0x10) #define I2C_SLAVE_TX_FIFO_EMPTY_INT (0x08) #define I2C_SLAVE_RX_FIFO_FULL_INT (0x04) #define I2C_SLAVE_RX_FIFO_AFULL_INT (0x02) #define I2C_SLAVE_RX_FIFO_READY_INT (0x01) #define I2C_SLAVE_INT_ENABLE (0x06*4) #define I2C_SLAVE_INT_SET (0x07*4) #define I2C_SLAVE_INT_STATUS2 (0x08*4) #define I2C_SLAVE_RX_ADDR_INI (0x08) #define I2C_SLAVE_START_DET_INT (0x04) #define I2C_SLAVE_STOP_ERR_INT (0x02) #define I2C_SLAVE_START_ERR_INT (0x01) #define I2C_SLAVE_INT_ENABLE2 (0x09*4) #define I2C_SLAVE_INT_SET2 (0x0a*4) #define I2C_SLAVE_FIFO_STATUS (0x0b*4) #define I2C_SLAVE_TR_COMPL (0x80) #define I2C_SLAVE_STOP_DET (0x40) #define I2C_SLAVE_TX_FIFO_FULL (0x20) #define I2C_SLAVE_TX_FIFO_AEMPTY (0x10) #define I2C_SLAVE_TX_FIFO_EMPTY (0x08) #define I2C_SLAVE_RX_FIFO_FULL (0x04) #define I2C_SLAVE_RX_FIFO_AFULL (0x02) #define I2C_SLAVE_RX_FIFO_EMPTY (0x01) #define I2C_SLAVE_RX_FIFO_READY (0x01) #define I2C_SLAVE_RX_ADDR_1_REG (0x0c*4) #define I2C_SLAVE_RX_RNW (0x01) #define I2C_SLAVE_RX_ADDR_2_REG (0x0d*4) #define I2C_SLAVE_STOP_ERR (0x02) #define I2C_SLAVE_START_ERR (0x01) #endif