The Lattice Semiconductor FPD-Link Transmitter IP translates parallel video streams to a Low Voltage Differential
Signaling (LVDS) interface for a Flat Panel Display Link (FPD-Link) connection to a display. The IP converts pixel data into
the standard OpenLDI serial video interface domain. The input interface for the design consists of the RGB control
signals, pixel clock, and up to two pixels per clock. The output interface consists of a data bus, vertical and horizontal
sync flags, a data enable, a clock in the OpenLDI (FPD-Link) interface format, and optional debug signals.
Crosslink-NX, Certus-NX (except LFD2NX-35, LFD2NX-65), CertusPro-NX,
MachXO5-NX (except LFMXO5-35, LFMXO5-35T, LFMXO5-65, LFMXO5-65T), Avant, Certus-N2