The Flash Access IP enables the user to access MachXO5-NX's flash memory through LMMI interface.
LFMXO5-25
| 1.0.3 |
Updated upper limit of internal LMMI CLK frequency to 50MHz. |
| 1.0.2 |
Updated design and testbench for on-chip flash erase function and testing. Updated mem_gen.py testbench file. |
| 1.0.1 |
Updated reset input of internal oscillator. Updated clock of logic design when oscilator high frequency clock is used. Added clk_i and rstn_i ports when internal oscilator is unused. Updated USERDATA block size default value after configuring other USERDATA. Changed default GUI setting. |
| 1.0.0 |
Initial release. |