The Lattice Semiconductor D-PHY Tx IP converts 64-bit data to either DSI or
CSI-2 data for Lattice Semiconductor LIFCL family devices.
The CSI-2/DSI D-PHY Transmitter Submodule IP is intended for use in
applications that require a D-PHY transmitter in the FPGA logic.
LIFCL
| 1.0.1 | Update for SP1. |
| 1.0.0 | Initial release. |