The Lattice Semiconductor D-PHY Rx IP converts DSI or CSI-2 data to 8-bit or
16-bit or 32-bit or 64-bit data for Lattice Semiconductor LIFCL family devices.
The CSI-2/DSI D-PHY Receiver Submodule IP is intended for use in applications
that require a D-PHY receiver in the FPGA logic.
LIFCL
| 1.0.1 | Update for SP1. |
| 1.0.0 | Initial release. |