<?xml version="1.0" encoding="UTF-8"?>
<lsccip:ip xmlns:lsccip="http://www.latticesemi.com/XMLSchema/Radiant/ip" xmlns:xi="http://www.w3.org/2001/XInclude" version="2.0" platform="radiant" platform_version="3.2">
    <lsccip:general>
        <lsccip:vendor>latticesemi.com</lsccip:vendor>
        <lsccip:library>ip</lsccip:library>
        <lsccip:name>debayer</lsccip:name>
        <lsccip:display_name>Debayer</lsccip:display_name>
        <lsccip:version>1.4.1</lsccip:version>
        <lsccip:category>Audio_Video_and_Image_Processing</lsccip:category>
        <lsccip:min_radiant_version>2024.1</lsccip:min_radiant_version>
        <lsccip:min_esi_version>2024.1</lsccip:min_esi_version>
        <lsccip:supported_products>
	<lsccip:supported_family name="LFCPNX">
	   </lsccip:supported_family>
	   <lsccip:supported_family name="LFD2NX">
	    <lsccip:supported_device name="LFD2NX-17">
	    </lsccip:supported_device>
	    <lsccip:supported_device name="LFD2NX-40">
	    </lsccip:supported_device>
	    <lsccip:supported_device name="LFD2NX-25">
	    </lsccip:supported_device>
	    <lsccip:supported_device name="LFD2NX-28">
	    </lsccip:supported_device>
		<lsccip:supported_device name="LFD2NX-25P">
	    </lsccip:supported_device>
		<lsccip:supported_device name="LFD2NX-15P">
	    </lsccip:supported_device>
	   </lsccip:supported_family>
	   <lsccip:supported_family name="LIFCL">
	   </lsccip:supported_family>
	   <lsccip:supported_family name="LAV-AT">
	   </lsccip:supported_family>
	   <lsccip:supported_family name="LN2-CT">
	   </lsccip:supported_family>
	   <lsccip:supported_family name="LN2-MH">
	   </lsccip:supported_family>
	  </lsccip:supported_products>
        <lsccip:supported_platforms>
            <lsccip:supported_platform name="esi"/>
            <lsccip:supported_platform name="radiant"/>
        </lsccip:supported_platforms>
    </lsccip:general>
    <lsccip:settings>
		<lsccip:setting id="IP_DIR" 
                        type="param" 
                        value_type="string" 
                        conn_mod="debayer_top" 
                        title="IP Directory" 
                        value_expr = "get_ip_dir_path()"
                        editable="False" 
                        hidden="True" 
                        description="Absolute path of the IP" 
                        group1="DEBAYER_Config" 
                        group2="DEBAYER"
        	/>
        	<lsccip:setting id="FAMILY" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="Device Architecture" 
				default="LIFCL" 
				value_expr="runtime_info.device_info.architecture(1)" 
				editable="False" 
				hidden="True" 
				group1="DEBAYER_Config" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="BITS_PER_PIXEL" 
				type="param" 
				value_type="int" 
				conn_mod="debayer_top" 
				title="Bits per pixel" 
				default="8" 
				options="[6,8,10,12,16]" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				description="Number of bits per color component of a pixel" 
				group1="Debayer Configuration" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="PIXELS_PER_CLK" 
				type="param" 
				value_type="int" 
				conn_mod="debayer_top" 
				title="Pixels per clock" 
				default="1" 
				options="[1,2,4]" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				description="Number of pixels streamed in or out in a clock" 
				group1="Debayer Configuration" 
				group2="DEBAYER"
		/>			
  		<lsccip:setting id="PARTIAL_RESOLUTION" 
				type="param" 
				value_type="bool" 
				conn_mod="debayer_top" 
				title="Partial Resolution" 
				default="False" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				description="This value describes whether resolution is a multiple of pixels per clock or not" 
				group1="Debayer Configuration" 
				group2="DEBAYER"
		/>              
		<lsccip:setting id="HORIZONTAL_SIZE" 
				type="param" 
				value_type="int" 
				conn_mod="debayer_top" 
				title="Horizontal size" 
				default="1920" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				value_range="(512,4096)" 
				description="Maximun number of pixels in horizontal line" 
				group1="Debayer Configuration" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="VERTICAL_SIZE" 
				type="param" 
				value_type="int" 
				conn_mod="debayer_top" 
				title="Vertical size" 
				default="1080" 
				output_formatter="nostr" 
				editable="True" 
				hidden="True" 
				value_range="(128,2160)" 
				description="Number of pixels in vertical line" 
				group1="Debayer Configuration" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="CSR_ENABLE" 
				type="param" 
				value_type="bool" 
				conn_mod="debayer_top" 
				title="Enable dynamic configuration" 
				default="True" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				description="Whether AXI-Lite based CSR (Configuration and Status Register) access is enabled" 
				group1="Dynamic Configuration" 
				group2="DEBAYER"
		/>	      
        	<lsccip:setting id="TX_BUFFER_DEPTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="Tx buffer depth" 
				default="1024" 
				options="['128','256','512','1024']" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				group1="FIFO" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="EMBEDDED_BUFFER_DEPTH" 
				type="param" 
				value_type="int" 
				conn_mod="debayer_top" 
				title="Blanking buffer Depth" 
				default="8192" 
				options="[128,512,1024,2048,4096,8192,10240]" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				description="Embedded Fifo depth of the blanking data" 
				group1="FIFO" 
				group2="DEBAYER"
		/>			
        	<lsccip:setting id="VIDEO_TYPE" 
				type="param" 
				value_type="bool" 
				conn_mod="debayer_top" 
				title="Video type" 
				default="True" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				description="0 - BAYER and 1 - RGB This value describes whether input image is Bayer or RGB and configured via CSR" 
				group1="CSR" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="BAYER_PATTERN" 
				type="param" 
				value_type="string" 
				conn_mod="awb_top" 
				title="Bayer pattern" 
				default="RGGB" 
				options= "['RGGB','BGGR','GRBG','GBRG']" 
				output_formatter="str" 
				editable="True" 
				hidden="False" 
				description="0 - RGGB 1 - BGGR 2-GRGB 3- GBGR This value describes which bayer pattern camera supports and it is configured via CSR" 
				group1="Configuration Default Values" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="DEBAYER_ENABLE" 
				type="param" 
				value_type="bool" 
				conn_mod="debayer_top" 
				title="Debayer enable" 
				default="True" 
				output_formatter="nostr" 
				editable="CSR_ENABLE" 
				hidden="False" 
				description="This value describes whether the DEBAYER IP should be enabld or not and it is configured via CSR" 
				group1="Configuration Default Values" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="CONFIG_DONE" 
				type="param" 
				value_type="bool" 
				conn_mod="debayer_top" 
				title="Config done" 
				default="True" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				description="This value tlls us when all values are configured via CSR and it is configured via CSR" 
				group1="CSR" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="RX_AXI_STREAM_DATA_BUS_WIDTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="Rx AXI Stream data bus width" 
				value_expr="int((math.ceil((BITS_PER_PIXEL*PIXELS_PER_CLK)/8))*8)" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				group1="AXI-Stream" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="AXI_LITE_ADDR_WIDTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="AXI-Lite addr width" 
				default="2" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				group1="AXI-Stream" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="AXI_LITE_DATA_WIDTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="AXI-Lite data width" 
				default="32" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				group1="AXI-Stream" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="TX_AXI_STREAM_DATA_BUS_WIDTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="Tx AXI Stream data bus width" 
				value_expr="int((math.ceil((3*BITS_PER_PIXEL*PIXELS_PER_CLK)/8))*8)" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				group1="AXI-Stream" 
				group2="DEBAYER"
		/>
        	<lsccip:setting id="RAM_ADDR_WIDTH" 
				type="param" 
				value_type="string" 
				conn_mod="debayer_top" 
				title="RAM Address width" 
				value_expr="clog2(HORIZONTAL_SIZE)" 
				output_formatter="nostr" 
				editable="False" 
				hidden="True" 
				group1="EBR" 
				group2="DEBAYER"
		/>
		<lsccip:setting id="TEST_NO" 
				type="verilog_macro" 
				value_type="int" 
				conn_mod="tb_top" 
				title="Test number" 
				default="3" 
				value_range="(1,20)" 
				output_formatter="nostr" 
				editable="True" 
				hidden="True" 
				group1="Test configuration" 
				group2="Test parameters"
		/>
		<lsccip:setting id="HORIZONTAL_PIXELS" 
				type="verilog_macro" 
				value_type="int" 
				conn_mod="tb_top" 
				title="Horizontal pixel Size" 
				description="Number of pixels in horizontal line of a image" 
				default="1920" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				value_range="(512,4096)" 
				group1="Test configuration" 
				group2="Test parameters"
		/>
		<lsccip:setting id="VERTICAL_PIXELS" 
				type="verilog_macro" 
				value_type="int" 
				conn_mod="tb_top" 
				title="Vertical pixel Size" 
				description="Number of pixels in vertical line of a image" 
				default="1080" 
				output_formatter="nostr" 
				editable="True" 
				hidden="False" 
				value_range="(128,2160)" 
				group1="Test configuration" 
				group2="Test parameters"
		/>
    </lsccip:settings>
    <lsccip:ports>
        <lsccip:port name="axis_rx_clk_i" 
		     dir="in" 
		     conn_mod="debayer_top"
	/>
        <lsccip:port name="axis_rx_arstn_i" 
		     dir="in" 
		     conn_mod="debayer_top"
	/>
        <lsccip:port name="axis_tx_clk_i" 
		     dir="in" 
		     conn_mod="debayer_top"
	/>
        <lsccip:port name="axis_tx_arstn_i" 
		     dir="in" 
		     conn_mod="debayer_top"
	/>	
        <lsccip:port name="rx_tdata_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(RX_AXI_STREAM_DATA_BUS_WIDTH-1,0)" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tuser_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(2,0)" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tlast_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tvalid_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tstrobe_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(int(RX_AXI_STREAM_DATA_BUS_WIDTH/8 -1),0)" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tkeep_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(int(RX_AXI_STREAM_DATA_BUS_WIDTH/8 -1),0)" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="rx_tready_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_S0"
	/>
        <lsccip:port name="tx_tready_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tdata_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(int(TX_AXI_STREAM_DATA_BUS_WIDTH-1),0)" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tvalid_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tstrobe_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(int(TX_AXI_STREAM_DATA_BUS_WIDTH/8 -1),0)" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tkeep_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(int(TX_AXI_STREAM_DATA_BUS_WIDTH/8 -1),0)" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tlast_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="tx_tuser_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(2,0)" 
		     bus_interface="AXI4S_M0"
	/>
        <lsccip:port name="axi_lite_clk" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="axi_lite_rst_n" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="aw_valid_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="aw_address_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(int(AXI_LITE_ADDR_WIDTH)-1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="aw_ready_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="w_valid_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="w_data_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(int(AXI_LITE_DATA_WIDTH)-1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
		<lsccip:port name="w_strobe_i"
		     dir="in"
		     conn_mod="debayer_top"
		     range="(int(AXI_LITE_DATA_WIDTH)-1,0)"
		     dangling="CSR_ENABLE != 1"
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="w_ready_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="b_valid_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="b_response_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="b_ready_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="ar_valid_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="ar_address_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     range="(int(AXI_LITE_ADDR_WIDTH)-1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="ar_ready_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="r_data_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(int(AXI_LITE_DATA_WIDTH)-1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="r_valid_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="r_response_o" 
		     dir="out" 
		     conn_mod="debayer_top" 
		     range="(1,0)" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
        <lsccip:port name="r_ready_i" 
		     dir="in" 
		     conn_mod="debayer_top" 
		     dangling="CSR_ENABLE != 1" 
		     bus_interface="AXI4L_S0"
	/>
    </lsccip:ports>
    <xi:include parse="xml" href="bus_interface.xml"/>
    <xi:include parse="xml" href="address_space.xml"/>
    <xi:include parse="xml" href="memory_map.xml"/>

<!--
		 -->
    <lsccip:componentGenerators>
      <lsccip:componentGenerator>
        <lsccip:name>main_debayer</lsccip:name>
        <lsccip:generatorExe>testbench/main_debayer.py</lsccip:generatorExe>
      </lsccip:componentGenerator>
    </lsccip:componentGenerators>
</lsccip:ip>