DDR3 SDRAM PHY

Description

The Lattice Double Data Rate (DDR3) Synchronous Dynamic Random Access Memory (SDRAM) PHY
is a general-purpose PHY interface that connects with industry standard DDR3
memory devices and modules compliant with the JESD-79.3 specification.

Devices Supported

LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-100

References

User Guide

Revision History

1.1.1	Updated the testbench to avoid name conflict with IP instnace.
1.1.0	Added CertusPro-NX support.
1.0.2	Updated for Radiant 2.2.
1.0.1	Updated for Radiant 2.1.
1.0.0	Preliminary release.

Limitations

When GSR is used with Synplify Pro, the post-PAR simulation might hang. We recommend customers to force disable GSR if they want to use Synplify Pro and run post-PAR simulation.