The Lattice Semiconductor DC-SCM LVDS Tunneling Protocol and Interface (LTPI) IP Core is Open Computer Project (OCP) Data Center – Secure Control Module (DC-SCM) Standards compatible solution. LTPI is a protocol and interface designed for tunneling various low-speed signals between the HPM and SCM. The LTPI protocol goes over the LVDS (Low Voltage Differential Signals) electrical interfaces. This is the next generation protocol for DC-SCM 2.0 as the replacement to two Serial GPIO (SGPIO) interfaces. It allows for tunneling of not only GPIOs but also low speed serial interfaces such as I2C and UART. It is also extensible with additional proprietary OEM interfaces and provides support for raw Data tunneling between HPM CPLD and SCM CPLD.
MachXO3L, MachXO3LF, MachXO3D, Mach-NX, MachXO5-NX
| 1.4.1 |
Fixed an issue with Data Channel read operation. Fixed a corner case issue related to I2C start and stop operation. Fixed LTPI version to 1.0 in GUI. |
| 1.4.0 |
Enhanced Data Channel support for better usability. - Separated APB interface for IP CSR and Data Channel access for SCM mode. Minor enhancement in system bus support. |
| 1.3.0 |
Added support for MachXO5-NX device. Expanded UART bus support from 8 to 24 maximum. Enhanced Default and Custom I/O frame: - For Default I/O Frame, channels can now be disabled. - For Custom I/O Frame, sequence of channels in the frame is now customizable. Added new tab in GUI for Frame Format view. Added descriptions for each attribute in GUI when hovered. Added new debug ports. Other minor IP enhancements. |
| 1.2.1 |
Fixed an issue in I2C repeated start operations. |
| 1.2.0 |
Added support for Mach-NX device. Fixed minor bug in interrupt reporting. |
| 1.1.1 |
Enhanced word alignment algorithm. |
| 1.1.0 |
Initial release for OCP DC-SCM 2.0 LTPI ver 1.0 compliance. |
| 1.0.0 |
Initial release. |