Byte to Pixel Converter

Description

The Lattice Semiconductor Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format. In addition, Byte-to-Pixel Converter IP generates camera/video control signals in the pixel domain, based on CSI-2 or DSI synchronization packets.

Devices Supported

LAV-AT, LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LIFCL-33, LFCPNX-50, LFCPNX-100, LFMXO5-25, LFMXO5-55T, LFMXO5-100T

References

Revision History

1.6.1 Fixed timing issue encountered in DSI configurations.
Fixed output issue encountered when AXI4-Stream Transmitter Interface is enabled.
Updated constraint file.
Added support for 4 output pixel lanes for RAW12 data type.
Other bug fixes.
Minor GUI enhancements.
1.6.0 Added Lattice Avant support.
Separated the rtl per data type under CSI-2 configuration.
Updated constraint file.
1.5.0 Added MachXO5-NX support.
1.4.0 Added DSI Sync Packet Delay attribute.
Fix for unintended early read from the FIFO even when the GUI threshold is manually adjusted.
1.3.0 Fixed lp_av_en issue encountered in DSI configurations.
Fixed synthesis issue encountered in Synplify Pro.
Updated constraint file.

1.2.0 Added CertusPro-NX support.
1.1.1 Added support for RAW12, RAW14 and RAW16 data types.
Fixed wire declaration of ports (multicycle nets).
1.1.0 Updated RTL to optimize FIFO instance.
Added RX and TX data rates(read only).
Updated IP to work correctly for YUV420_8 and YUV420_10 data types.
Removed Odd/Even attribute from YUV data types.
Fixed threshold calculation issue for small word counts.
1.0.3 Added Certus-NX support.
1.0.2 Updated for Radiant 2.0 Service Pack 1.
1.0.1 Production release.
1.0.0 Initial release.