The Lattice Semiconductor Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format. In addition, Byte-to-Pixel Converter IP generates camera/video control signals in the pixel domain, based on CSI-2 or DSI synchronization packets.
LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17, LFCPNX-100
| 1.4.0 | Added DSI Sync Packet Delay attribute. Fix for unintended early read from the FIFO even when the GUI threshold is manually adjusted. |
| 1.3.0 | Fixed lp_av_en issue encountered in DSI configurations. Fixed synthesis issue encountered in Synplify Pro. Updated constraint file. |
| 1.2.0 | Added CertusPro-NX support. |
| 1.1.1 | Added support for RAW12, RAW14 and RAW16 data types Fixed wire declaration of ports (multicycle nets)
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| 1.1.0 | Updated RTL to optimize FIFO instance. Added RX and TX data rates(read only). Updated IP to work correctly for YUV420_8 and YUV420_10 data types. Removed Odd/Even attribute from YUV data types. Fixed threshold calculation issue for small word counts.
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| 1.0.3 | Added Certus-NX support. |
| 1.0.2 | Updated for Radiant 2.0 Service Pack 1. |
| 1.0.1 | Production release. |
| 1.0.0 | Initial release. |