AXI4 Interconnect

Description

The AMBA AXI is for high-performance, high clock frequency system modules. The AXI acts as the high-performance system backbone bus. AXI supports the efficient connection of processors, on-chip memories and off-chip external memory interfaces with low-power peripheral macrocell functions.

Devices Supported

LFCPNX-100, LAV-AT-E70, LAV-AT-G70, LAV-AT-X70

References

Revision History

1.2.1 Increased the maximum fragmented address space from 8 to 16 fragments per external subordinate
1.2.0 Changed the default value of AXI User Width, AXI Manager Max no. of ID supports, External Manager No. of IDs , External Manager Write accept, External Manager Read accept, External Subordinate Write Issue , and External Subordinate Read Issue in User Guide Table 2.2. Attributes Table
1.1.0 Added LAV-AT support
1.0.0 Initial release