/** * @file ltcusb_command.h * @brief Device Command Structure * @note * * ------------------------------------------------------------------ Copyright (c) 2023 by Lattice Semiconductor Corporation ALL RIGHTS RESERVED ------------------------------------------------------------------ DISCLAIMER: LATTICE MAKES NO WARRANTIES ON THIS FILE OR ITS CONTENTS, WHETHER EXPRESSED, IMPLIED, STATUTORY, OR IN ANY PROVISION OF THE LATTICE PROPEL LICENSE AGREEMENT OR COMMUNICATION WITH LICENSEE, AND LATTICE SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. LATTICE DOES NOT WARRANT THAT THE FUNCTIONS CONTAINED HEREIN WILL MEET LICENSEE 'S REQUIREMENTS, OR THAT LICENSEE' S OPERATION OF ANY DEVICE, SOFTWARE OR SYSTEM USING THIS FILE OR ITS CONTENTS WILL BE UNINTERRUPTED OR ERROR FREE, OR THAT DEFECTS HEREIN WILL BE CORRECTED. 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IT IS THE USER' S RESPONSIBILITY TO VERIFY THE USER SOFTWARE DESIGN FOR CONSISTENCY AND FUNCTIONALITY THROUGH THE USE OF FORMAL SOFTWARE VALIDATION METHODS. ------------------------------------------------------------------ */ #ifndef SRC_LTCUSB_COMMAND_H_ #define SRC_LTCUSB_COMMAND_H_ #include "ltcusb.h" #include #include /** * @brief Holding the Parameter 1 value for the physical endpoint * configuration information. */ typedef struct DEPCFG_Par1_struct { /**@brief bit 4:0, Interrupt Number*/ uint32_t IntrNum : 5; /**@brief bit 7:5, Reserved*/ uint32_t reserved_7_5 : 3; /**@brief bit 13:8, device event mask*/ uint32_t event_enable_mask : 6; /**@brief bit 14, only set when bit_15 is also set.*/ uint32_t bit_14 : 1; /**@brief bit 15, more info in table 3.3.*/ uint32_t bit_15 : 1; /**@brief bit 23:16, bInterval value minus 1 */ uint32_t bInterval_m1 : 8; /**@brief bit 24, stream capable */ uint32_t StrmCap : 1; /**@brief bit 25, USB endpoint direction for number in 29:26. * IN = 0x1 * OUT = 0x0 * @note This direction is reversed from USB Standard*/ uint32_t USB_ep_dir : 1; /**@brief bit 29:26, USB endpoint number.*/ uint32_t USB_ep_number : 4; /**@brief bit 30, reserved */ uint32_t reserved_30 : 1; /**@brief bit 31, FIFO Based */ uint32_t FIFO_Based : 1; }DEPCFG_Par1; /** * @brief Holding the Parameter 0 value for the physical endpoint * configuration information. */ typedef struct DEPCFG_Par0_struct { /**@brief bit 0, Reserved */ uint32_t reserved_0 : 1; /**@brief bit 2:1, Endpoint Type */ uint32_t EPType : 2; /**@brief bit 13:3, Maximum Packet Size */ uint32_t maximum_packet_size : 11; /**@brief bit 16:14, Reserved */ uint32_t reserved_16_14 : 3; /**@brief bit 21:17, FIFO Number */ uint32_t FIFONum : 5; /**@brief 25:22, Burst Size */ uint32_t BrstSiz : 4; /**@brief 29:26, Reserved */ uint32_t reserved_29_26 : 4; /**@brief 31:30, Config Action */ uint32_t config_action : 2; }DEPCFG_Par0; /** * @brief Set Endpoing Configuration, Device Physical endpoint specific * command * @param ep_number Endpoint number. * @param parameter2 Parameter2 to be set on endpoint. * @param parameter1 Parameter1 to be set on endpoint. * @param parameter0 Parameter0 to be set on endpoint. * @return 0 When success * @retval 0 Operation Successful * @retval -1 depcmdpar set is failed. * @retval -2 depcmdpar get is failed. * @retval -3 Parameter set verification failed. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPCFG_cmd(uint32_t ep_number, uint32_t parameter2, DEPCFG_Par1* parameter1, DEPCFG_Par0* parameter0); /** * @brief Parameter 0 structure of Set Endpoint Transfer Resource * Configuration. */ typedef struct DEPXFERCFG_Par0_struct { /**@brief bit 15:0, Number of Transfer Resources */ uint32_t NumXferRes : 16; /**@brief 31:16, Reserved */ uint32_t reserved_31_16 :16; }DEPXFERCFG_Par0; /** * @brief Set Endpoint Transfer Resource Configuration * command. * @param ep_number Endpoint number. * @return 0 When success. * @retval 0 Operation Successful. * @retval -1 depcmdpar set is failed. * @retval -2 depcmdpar get is failed. * @retval -3 Parameter set verification failed. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPXFERCFG_cmd(uint32_t ep_number); /** * @brief Get Endpoint State Command. * After Get Endpoint State ( DEPGETSTATE ) command completes, * the 32 bits in DEPCMDPAR2 represent the endpoint state to * be saved. * @note Not Used, hence, not defined */ extern int DEPGETSTATE_cmd(); /** * @brief Set Stall command is used to stall all tokens from the * USB host to this endpoint. *@param ep_number Endpoint number. * @return 0 When success. * @retval 0 Operation Successful. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPSSTALL_cmd(uint32_t ep_number); /** * @brief Clear Stall command is used to stall all tokens from the * USB host to this endpoint. *@param ep_number Endpoint number. * @return 0 When success. * @retval 0 Operation Successful. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPCSTALL_cmd(uint32_t ep_number); /** * @brief Indicates the lower 32 bits of the external memory's start address * for the transfer descriptor. */ typedef struct DEPSTRTXFER_Par1_struct { /**@brief bit 31:0, Transfer Descriptor Address Low */ uint32_t TDAddr_Low : 32; }DEPSTRTXFER_Par1; /** * @brief Indicates the higher 32 bits of the external memory's start address * for the transfer descriptor. */ typedef struct DEPSTRTXFER_Par0_struct { /**@brief bit 31:0, Transfer Descriptor Address High */ uint32_t TDAddr_High : 32; }DEPSTRTXFER_Par0; /** * @brief Start Transfer command indicate that a descriptor is ready to * be processed and DMA can start for this endpoint. * @param ep_number Endpoint number. * @param parameter1 Parameter1 to be set on endpoint. * @param parameter0 Parameter0 to be set on endpoint. * @return 0 When success * @retval 0 Operation Successful * @retval -1 depcmdpar set for parameter 1 is failed. * @retval -2 depcmdpar set for parameter 0 is failed. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPSTRTXFER_cmd(uint32_t ep_number, DEPSTRTXFER_Par1* parameter1, DEPSTRTXFER_Par0* parameter0); /** * @brief Update Transfer Command. * If software uses circular TRB buffers and updates a TRB, * whose Hardware Owner ( HWO ) bit was 0, by setting * HWO=1 , it must execute the Update Transfer command, * specifying the transfer resource index of the TRB in * the DEPCMD register. The hardware uses this information * to re-cache the TRB. * @note Not Used, hence, not defined */ extern int DEPUPDXFER_cmd(); /** * @brief End Transfer Command. * Software issues this command requesting DMA to stop for the * endpoint/stream specifying the transfer resource index of * the TRB. * @param ep_number Endpoint number. * @return 0 When success. * @retval 0 Operation Successful. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPENDXFER_cmd(uint32_t ep_number); /** * @brief Start New Configuration * @param ep_number Endpoint number * @return 0 When success * @retval 0 Operation successful * @retval -1 Operation failed. * @retval -200 when reset Poll for CmdAct failed. */ extern int DEPSTARTCFG_cmd(unsigned int ep_number); /** * @brief Execute the command on the hardware by setting up the command type * and command active bit is set from software and wait until is * cleared by the hardware. * @param cmdtyp Type of command to be executed. * @param endpoint_number Number of endpoint for which commands needs to be * executed. * @return 0 When success. Negative on error. * @retval -1 When Depcmd register write failed. * @retval -2 when Depcmd register read failed. * @retval -200 when reset Poll for CmdAct failed. */ extern int execute_command(Command_type cmdtyp, uint32_t endpoint_number); #endif /* SRC_LTCUSB_COMMAND_H_ */