/**
 * @file	device_soft_rst.h
 * @brief	Initialize the controller on Power On or Soft Reset.
 * @note
 *  * ------------------------------------------------------------------
     Copyright (c) 2023 by Lattice Semiconductor Corporation

     ALL RIGHTS RESERVED

------------------------------------------------------------------

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 */

#ifndef SRC_DEVICE_SOFT_RST_H_
#define SRC_DEVICE_SOFT_RST_H_

#include "ltcusb.h"
#include "rv_delay.h"
#include "ltcusb_command.h"
#include <stdio.h>
#include <stdlib.h>
#include "trb_fifo.h"

/**
 * @brief	Device Power On or Soft reset
 *
 * Implemented as per the section 4.1.1 for the document Programming DWC_usb3
 *  in device mode.
 * @return	0 when success, a negative value when failed.
 * @retval	-1 DCTL.CSFTRST unable to low by hardware, retry count reached.
 * @retval	-2 Geventadr init failed.
 * @retval	-3 Geventadr get failed.
 * @retval	-4 Get event address from hardware didn't matched with set address.
 * @retval	-5 Set Gevent size failed.
 * @retval	-6 Get Gevent size failed.
 * @retval	-7 Event size mismatched.
 * @retval	-8 Gevent count failed.
 * @retval	-9 Gevent count get failed.
 * @retval	-10 Gevent count mismatched.
 * @retval	-11 GCTL register write failed.
 * @retval	-12 DCTL register write failed.
 * @retval	-13 DCFG write failed.
 * @retval	-14 DEVTEN write failed.
 * @retval	-15 DEPSTARTCFG Command failed.
 * @retval	-16 DCTL register read failed.
 * @retval	-17 DALEPENA register write failed.
 * @retval	-18 DCTL register write failed after RUN STOP.
 * @retval	-19 DEPCFG command failed for EP0.
 * @retval	-20 DEPCFG command failed for EP1.
 * @retval	-21 DEPXFERCFG command failed for EP0.
 * @retval	-22 DEPXFERCFG command failed for EP1.
 * @retval	-23 TRB_control_setup failed.
 * @retval	-24 Register at offset (0x000100AC) write failed.
 * @retval	-25 Register at offset (0x0001008C) write failed.
 */
extern int device_power_on_soft_rst(void);


#endif /* SRC_DEVICE_SOFT_RST_H_ */