The Lattice 2D Scaler IP Core converts incoming video frames of one size to outgoing video frames of a different size.
Its flexible architecture supports a wide variety of scaling algorithms. The highly-parameterized design takes
advantage of the embedded DSP blocks available in Lattice FPGAs. A simple I/O handshake makes the core suitable for
either streaming or bursty input video data. Coefficients may be set at compile time, or updated in system via a simple
memory interface. Dynamic zoom and pan functions are optionally provisioned at compile time.
LIFCL-40, LIFCL-17, LFD2NX-40, LFD2NX-17
| 1.0.0 | Initial release. |